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Xilinx - Designing an Integrated PCI Express System

Course Description

Attending this course will provide students a working knowledge of how to implement a Xilinx® PCI Express core in custom applications. This course offers students hands-on experience with implementing a Xilinx PCI Express system within the customer education reference design. With this experience, users can improve their time to market with the PCIe core design. Various Xilinx PCI Express core products will be enumerated to aid in selecting the proper solution. This course focuses on the AXI streaming interconnect.

Training Duration

2 days

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Upcoming Live Webinars

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Wednesday November 11 2026

1 hour session (All Time Zones)

This webinar explores best practices for avoiding memory issues in design and debugging memory usage issues in C and C++.

cocotb - An Introduction for Python Programmers

Friday November 13 2026

1 hour session (All Time Zones)

With many engineers having a working knowledge of Python, cocotb can prove a highly effective verification tool. This webinar will help you get started!

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Tuesday November 24 2026

1 hour session (All Time Zones)

This webinar will walk through the design process for using AMD Kria SOMs, including the use of Vivado and Vitis.

Understanding Random Stability in SystemVerilog and UVM

Tuesday December 01 2026

1 hour session (All Time Zones)

This webinar will explain random stability in SystemVerilog and in UVM, the Universal Verification Methodology.

Zephyr Insights: Scheduling and Threads

Friday December 04 2026

1 hour session (All Time Zones)

This webinar delves into the services offered by Zephyr to ensure real-time behaviour, with a primary focus on threads, priority management, and scheduling, highlighting similarities and differences to other RTOSs.