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AMD Ross Agentic AI ONLINE WORKSHOP

Standard Level - 1 session (approximately 5 hours per session)

With thanks to AMD for sponsoring this workshop:
It is available to attend FREE OF CHARGE (Usual price $990)

October 22, 2026 - EurAsia - Register now »
October 23, 2026 - Americas - Register now »

In this FREE WORKSHOP (delivered in 1 half day session) you will be introduced to the AMD Ross Agentic AI tool, which provides FPGA design automation using Agentic AI.

The AMD Ross Agentic AI  provides the interface between the Vivado tool and Agentic AI models to accelerate the design process of FPGA based systems using natural language commands.

The workshop is designed to maximize individual engagement and learning. Each attendee is encouraged to informally ask pertinent questions throughout, to actively participate in the learning process.

FPGA developers and system designers working with Vivado, who wish to use Agentic AI capabilities to accelerate the design process.

The workshop has been created to be accessible by a wide audience with standard technology requirements.

If you have not attended a Doulos workshop or webinar before, you can check your connection with the meeting service here »

Delivered across 1 half-day session

The emphasis of this workshop is to demonstrate use of Agentic AI to accelerate FPGA design flow using the Vivado tool.  The following topics will be covered during the session.

  • Working of retrieval-augmented generation (RAG) based knowledge base to assist agentic AI

  • Closed loop mechanism to resolve errors during design flow

  • Use of Model Context Protocol (MCP) server to interface with large language model, knowledge base, and Vivado IDE

  • Trade-offs in using cloud-based frontier models or on-perm based local models

  • Creating deterministic workflow using skills to avoid model hallucinations

  • Pre-built AI agent skills and example on creating your own custom skill

  • Examples on use of Agentic AI for block-based design creation, RTL linting, timing closure and insertion of integrated logic analyzer (ILA) probes for design debugging.

Selected labs will be demonstrated by the presenter.

Please come prepared to actively participate and engage directly with the workshop facilitator.

This workshop is delivered in two half day sessions of interactive training comprising presentations with Q&A.

  • EurAsia start time 

    • 0830 BST | 0930 CEST | 1300 IST

  • Americas start time 

    • 0830 PDT | 1030 CDT | 1130 EDT

  • There will be some short breaks during  the training 

There are no specific hardware requirements for this workshop, please check your connection with GoToWebinar here if you have not used it to attend a Doulos event before.

The workshops have kindly been sponsored by AMD, and are available to attend FREE OF CHARGE.

Usual value of this training is $990 / €850

Please contact us for further details »