Summary of SystemVerilog Extensions to Verilog

SystemVerilog adds important new constructs to Verilog-2001, including:

New data types: byte, shortint, int, longint, bit, logic, string, chandle
Typedef, struct, union, tagged union, enum
Dynamic and associative arrays; queues
Classes
Automatic/static specification on a per variable instance basis
Packages and support for Compilation Units
Extensions to Always blocks for modelling combinational, latched or clocked processes
Jump Statements (return, break and continue)
Extensions to fork-join, disable and wait to support dynamic processes
Interfaces to encapsulate communication
Clocking blocks to support cycle-based methodologies
Program blocks for describing tests
Randomization and constraints for random and directed-random verification
Procedural and concurrent assertions and coverage for verification
Enhancements to events and new Mailbox and Semaphore built-in classes for inter-process communication
The Direct Programming Interface, which allows C functions to be called directly from SystemVerilog (and vice versa) without using the PL
Assertions and Coverage Application Programming Interfaces (APIs) and extensions to the Verilog Procedural Interface (VPI) – details of these are outside the scope of the SystemVerilog Golden Reference Guide

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